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FUJITSU SEMICONDUCTOR DATA SHEET
DS04-27237-2E
ASSP for Power Supply Applications
(DC/DC converter for DSC/camcorder)
5 ch DC/DC Converter IC with Synchronous Rectification
MB39A108
DESCRIPTION
The MB39A108 is 5-channel DC/DC converter IC using pulse width modulation (PWM), and is suitable for up conversion, down conversion, and up/down conversion. The MB39A108 is built in 5 channels into TSSOP-38P/ BCC-40P package and operates at 2 MHz maximum. Each channel can be controlled with soft-start. The MB39A108 is suitable for power supply of high performance portable instruments such as DSC.
FEATURES
* * * * * * * * * * * * * Supports for down-conversion with synchronous rectification (CH1) Supports for down-conversion and up/down Zeta conversion (CH2, CH3) Supports for up-conversion and up/down Sepic conversion (CH4, CH5) Low voltage start-up (CH4, CH5) : 1.7 V Power supply voltage range : 2.5 V to 11 V Reference voltage : 2.0 V 1% Error amplifier threshold voltage : 1.00 V 1% (CH1), 1.23 V 1% (CH2 to CH5) Oscillation frequency range : 200 kHz to 2.0 MHz Standby current : 0 A (Typ) Built-in soft-start circuit independent of loads Built-in totem-pole type output for MOS FET Short-circuit detection capability by external signal ( - INS terminal) Two types of package (TSSOP-38 pin : 1 type, BCC-40 pin : 1 type)
APPLICATIONS
* Digital still camera (DSC) * Digital video camera (DVC) * Surveillance camera etc.
Copyright(c)2005-2006 FUJITSU LIMITED All rights reserved
MB39A108
PIN ASSIGNMENT
(TOP VIEW)
CS2 -INE2 FB2 DTC2 VCC CTL CTL3 CTL4 CTL5 -INS VREF RT CT GND CSCP DTC3 FB3 -INE3 CS3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 CS1 -INE1 FB1 VCCO OUT1-1 OUT1-2 OUT2 OUT3 OUT4 OUT5 GNDO CS5 -INE5 FB5 DTC5 DTC4 FB4 -INE4 CS4
(FPT-38P-M03)
(Continued)
2
MB39A108
(Continued)

VCCO 32 -INE2 -INE1 34 DTC2 CS2 CS1 FB2 FB1 33 NC
VCC
1
40
39
38
37
36
35
31
OUT1-1
CTL CTL3 CTL4 CTL5 -INS VREF RT CT GND
2 3 4 5 6 7 8 9 10
30 29 28 27 26 25 24 23 22
OUT1-2 OUT2 OUT3 OUT4 OUT5 GNDO CS5 -INE5 FB5
11
12
13
14
15
16
17
18
19
20
21
DTC5
CSCP
DTC3
CS3
CS4
-INE3
-INE4
(LCC-40P-M07)
DTC4
FB3
NC
FB4
3
MB39A108
PIN DESCRIPTION
Pin No. Block 36 37 38 CH1 34 33 4 3 CH2 2 1 32 16 17 CH3 18 19 31 23 22 CH4 21 20 30 24 25 CH5 26 27 29 OSC 13 12 31 30 40 39 38 37 29 12 13 14 15 28 20 19 18 17 27 21 22 23 24 26 9 8 OUT1-1 OUT1-2 DTC2 FB2 - INE2 CS2 OUT2 DTC3 FB3 - INE3 CS3 OUT3 DTC4 FB4 - INE4 CS4 OUT4 DTC5 FB5 - INE5 CS5 OUT5 CT RT O O I O I O I O I O I O I O I O I O PKG TSSOP BCC 33 34 35 FB1 - INE1 CS1 O I Error amplifier output terminal. Error amplifier inverted input terminal. Soft-start setting capacitor connection terminal. P-ch drive output terminal (External main side FET gate driving). N-ch drive output terminal (External synchronous rectification side FET gate driving). Dead time control terminal. Error amplifier output terminal Error amplifier inverted input terminal. Soft-start setting capacitor connection terminal. P-ch drive output terminal. Dead time control terminal. Error amplifier output terminal Error amplifier inverted input terminal. Soft-start setting capacitor connection terminal. P-ch drive output terminal. Dead time control terminal. Error amplifier output terminal. Error amplifier inverted input terminal. Soft-start setting capacitor connection terminal. N-ch drive output terminal. Dead time control terminal. Error amplifier output terminal. Error amplifier inverted input terminal. Soft-start setting capacitor connection terminal. N-ch drive output terminal. Triangular wave frequency setting capacitor connection terminal. Triangular wave frequency setting resistor connection terminal. (Continued) Pin name I/O Description
4
MB39A108
(Continued) Pin No. Block 6 7 Control 8 9 15 10 35 5 Power 11 28 14 PKG TSSOP BCC 2 3 4 5 11 6 32 1 7 25 10 CTL CTL3 CTL4 CTL5 CSCP - INS VCCO VCC VREF GNDO GND I I I I I O Power supply control terminal. CH3 control terminal. CH4 control terminal. CH5 control terminal. Short-circuit detection circuit capacitor connection terminal. Short-circuit detection comparator inverted input terminal. Drive output block power supply terminal. Power supply terminal. Reference voltage output terminal. Drive output block ground terminal. Ground terminal. Pin name I/O Description
Note : The terminal number which has been described in the text is the one of the TSSOP-38P package after this.
5
MB39A108
BLOCK DIAGRAM
-INE1 37 VREF priority 10 A CS1 38
L
Error - Amp1 + +
+ -
PWM Comp.1 Dead Time
<> Io = 130 mA at VCCO = 4 V Drive1-1
P-ch
35 VCCO
34 OUT1-1
1.0 V FB1 36 Threshold voltage 1.0 V 1%
Drive1-2
N-ch
33 OUT1-2
Dead Time (td = 50 ns) -INE2 2
L L priority
Io = 130 mA at VCCO = 4 V <>
VREF priority Error Amp2 10 A - + +
Max Duty VREF 90% 5%
CS2 1
+ + -
PWM Comp.2
Drive2
P-ch
32 OUT2
1.23 V FB2 3 DTC2 4 -INE3 18 Threshold voltage 1.23 V 1%
L L
Io = 130 mA at VCCO = 4 V <>
CS3 19
VREF priority Error Amp3 1 A - + + 1.23 V
Max Duty VREF priority 90% 5% PWM Comp.3 + + -
Drive3
P-ch
31 OUT3
FB3 17 DTC3 16 -INE4 21 Threshold voltage 1.23 V 1%
L L
Io = 130 mA at VCCO = 4 V <>
CS4 20
VREF priority Error Amp4 1 A - + + 1.23 V
Max Duty VREF priority 90% 5% PWM Comp.4 + + -
Drive4
N-ch
30 OUT4
FB4 22 DTC4 23 -INE5 26
Threshold voltage 1.23 V 1%
L L
Io = 130 mA at VCCO = 4 V <>
CS5 27
VREF priority Error Amp5 1 A - + + 1.23 V
Max Duty VREF priority 90% 5% PWM Comp.5 + + -
Drive5
N-ch
29 OUT5 28 GNDO
FB5 25 DTC5 24
Threshold voltage 1.23 V 1% VREF 100 k SCP Comp. SCP H: at SCP
Io = 130 mA at VCCO = 4 V
-INS 10
Short-circuit detection signal (L: at short-circuit)
1V
- +
CSCP 15 0.9 V CTL3 7 CTL4 8 CTL5 9 CH CTL 0.4 V OSC
H: release UVLO Error Amp power supply SCP Comp. power supply Error Amp reference
5 VCC
UVLO2 UVLO1
bias
1.23 V VREF
Accuracy 0.8%
Power VR ON/OFF CTL
6 CTL
12 RT
13 CT
2.0 V 11 VREF
14 GND
6
MB39A108
ABSOLUTE MAXIMUM RATINGS
Parameter Power supply voltage Output current Peak output current Power dissipation Storage temperature Symbol VCC IO IOP PD TSTG Conditions VCC, VCCO terminal OUT1 to OUT5 terminal OUT1 to OUT5 terminal Duty 5% (t = 1/fosc x Duty) Ta + 25 C (TSSOP-38P) Ta + 25 C (BCC-40P) Ratings Min - 55 Max 12 20 400 1680*1 1020*2 + 125 Unit V mA mA mW mW C
*1 : When mounted on a 76 mm x 76 mm x 1.6 mm FR-4 boards. *2 : When mounted on a 117 mm x 84 mm x 0.8 mm FR-4 boards. WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current, temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
7
MB39A108
RECOMMENDED OPERATING CONDITIONS
Parameter Start power supply voltage Power supply voltage Reference voltage output current Input voltage Control input voltage Output current Oscillation frequency Timing capacitor Timing resistor Soft-start capacitor Short-circuit detection capacitor Reference voltage output capacitor Operating ambient temperature Symbol VCC VCC IREF VINE VDTC VCTL IO fOSC CT RT CS CSCP CREF Ta Conditions VCC, VCCO terminal (CH4, CH5) VCC, VCCO terminal (CH1 to CH5) VREF terminal - INE1 to - INE5 terminal - INS terminal DTC2 to DTC5 terminal CTL, CTL3 to CTL5 terminal OUT1 to OUT5 terminal * CS1 to CS5 terminal Value Min 1.7 2.5 -1 0 0 0 0 - 15 0.2 27 3.0 - 30 Typ 4 0.97 100 6.8 0.1 0.1 0.1 + 25 Max 11 11 0 VCC - 0.9 VREF VREF 11 + 15 2.0 680 39 1.0 1.0 1.0 + 85 Unit V V mA V V V V mA MHz pF k F F F C
* : Refer to " SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY". WARNING: The recommended operating conditions are required in order to ensure the normal operation of the semiconductor device. All of the device's electrical characteristics are warranted when the device is operated within these ranges. Always use semiconductor devices within their recommended operating condition ranges. Operation outside these ranges may adversely affect reliability and could result in device failure. No warranty is made with respect to uses, operating conditions, or combinations not represented on the data sheet. Users considering application outside the listed conditions are advised to contact their FUJITSU representatives beforehand.
8
MB39A108
ELECTRICAL CHARACTERISTICS
(VCC = VCCO = 4 V, Ta = + 25 C) Parameter Output voltage Reference voltage block [VREF] Input stability Load stability Temperature stability Short-circuit output current Under voltage lockout protection circuit block (CH1 to CH3) [UVLO1_3] Under voltage lockout protection circuit block (CH4, CH5) [UVLO4_5] Short-circuit detection block [SCP] Threshold voltage Hysteresis width Reset voltage Threshold voltage Hysteresis width Reset voltage Threshold voltage Input source current Oscillation frequency Triangular wave oscillator block [OSC] Frequency input stability Frequency temperature stability Soft-start block (CH1, CH2) [CS1, CS2] Soft-start block (CH3 to CH5) [CS3 to CS5] Charge current Charge current
Symbol Pin No.
Conditions VREF = 0 mA VCC = 2.5 V to 11 V VREF = 0 mA to - 1 mA VCC = 2.5 V to 11 V VREF = 0 mA to - 1 mA Ta = 0 C to + 85 C VREF = 0 V VCC = VCC = VCC = VCC =
Value Min 1.98 1.975 1.975 1.7 0.05 1.55 1.35 0.02 1.27 0.65 - 1.4 0.92 Typ 2.00 2.000 2.000 2* 2* 0.20* - 130* 1.8 0.1 1.7 1.5 0.05 1.45 0.70 - 1.0 0.97 0.97 1.0* 1.0* Max 2.02 2.025 2.025 1.9 0.2 1.85 1.65 0.1 1.63 0.75 - 0.6 1.02 1.023
Unit V V V mV mV % mA V V V V V V V A MHz MHz % %
VREF1 VREF2 VREF3 Line Load VREF/ VREF IOS VTH VH VRST VTH VH VRST VTH ICSCP fOSC1 fOSC2 fOSC/ fOSC fOSC/ fOSC ICS
11 11 11 11 11 11 11 34 34 34 30 30 30 15 15
29 to 34 CT = 100 pF, RT = 6.8 k 29 to 34 29 to 34 29 to 34
CT = 100 pF, RT = 6.8 k 0.917 VCC = 2.5 V to 11 V CT = 100 pF, RT = 6.8 k VCC = 2.5 V to 11 V CT = 100 pF, RT = 6.8 k Ta = 0 C to + 85 C CS1, CS2 = 0 V
1, 38
- 13
- 10
-7
A
ICS
19, 20, CS3 to CS5 = 0 V 27
- 1.3
- 1.0
- 0.7
A
* : Standard design value (Continued)
9
MB39A108
(VCC = VCCO = 4 V, Ta = + 25 C) Parameter
Symbol Pin No.
Conditions VCC = 2.5 V to 11 V Ta = + 25 C VCC = 2.5 V to 11 V Ta = 0 C to + 85 C Ta = 0 C to + 85 C - INE1 = 0 V DC Av = 0 dB FB1 = 0.65 V FB1 = 0.65 V VCC = 2.5 V to 11 V Ta = + 25 C VCC = 2.5 V to 11 V Ta = 0 C to + 85 C Ta = 0 C to + 85 C - INE2 to - INE5 = 0V DC AV = 0 dB FB2 to FB5 = 0.65 V FB2 to FB5 = 0.65 V
Value Min 0.990 0.988 - 120 1.7 150 1.217 1.215 - 120 1.7 150 Typ 1.000 1.000 0.1* - 30 100* 1.4* 1.9 40 -2 200 1.230 1.230 0.1* - 30 100* 1.4* 1.9 40 -2 200 Max 1.010 1.012 200 -1 1.243 1.245 200 -1
Unit V V % nA dB MHz V mV mA A V V % nA dB MHz V mV mA A
VTH1 Threshold voltage VTH2 Temperature stability Input bias current Error amp block Voltage gain (CH1) Frequency [Error Amp1] bandwidth Output voltage Output source current Output sink current VTH/ VTH IB AV BW VOH VOL ISOURCE ISINK VTH1 Threshold voltage VTH2 Temperature stability Input bias current Error amp block Voltage gain (CH2 to CH5) [Error Amp2 to Frequency Error Amp5] bandwidth VTH/ VTH IB AV BW VOH Output voltage VOL Output source current Output sink current * : Standard design value ISOURCE ISINK
37 37 37 37 36 36 36 36 36 36 2, 18, 21, 26 2, 18, 21, 26 2, 18, 21, 26 2, 18, 21, 26 3, 17, 22, 25 3, 17, 22, 25 3, 17, 22, 25 3, 17, 22, 25 3, 17, 22, 25 3, 17, 22, 25
(Continued)
10
MB39A108
(Continued) ( VCC = VCCO = 4 V, Ta = + 25 C)
Symbol Pin No.
Parameter PWM comparator block (CH1) [PWM Comp.1] PWM comparator block (CH2 to CH5) [PWM Comp.2 to PWM Comp.5] Threshold voltage Threshold voltage Maximum duty cycle Output source current Output sink Output block current (CH1 to CH5) [Drive1 to Drive5] Output on resistor Dead time Short-circuit detection block [SCP Comp.] Threshold voltage Input bias current Output on condition Output off condition Input current Standby current Power supply current * : Standard design value
Conditions Duty cycle = 0% Duty cycle = 100%
Value Min 0.35 0.85 0.35 0.85 85 Typ 0.4 0.9 0.4 0.9 90 - 130 Max 0.45 0.95 0.45 0.95 95 - 75
Unit V V V V %
VT0 VT100 VT0 VT100 Dtr
33, 34 33, 34
29 to 32 Duty cycle = 0% 29 to 32 Duty cycle = 100% 29 to 32 CT = 100 pF, RT = 6.8 k Duty 5% (t = 1/fosc x Duty) OUT = 0 V Duty 5% (t = 1/fosc x Duty) OUT = 4 V
ISOURCE
29 to 34
mA
ISINK ROH ROL tD1 tD2 VTH IB VIH VIL ICTLH ICTLL ICCS ICCSO ICC
29 to 34
75 0.97 - 25 1.5 0 5
130 18 18 50* 50* 1.00 - 20 30 0 0 4
27 27 1.03 - 17 11 0.5 60 1 2 1 6
mA ns ns V A V V A A A A mA
29 to 34 OUT = - 15 mA 29 to 34 OUT = 15 mA 33, 34 33, 34 34 10 OUT2 OUT1 - OUT1 - OUT2 - INS = 0 V
6, 7 to 9 CTL, CTL3 to CTL5 6, 7 to 9 CTL, CTL3 to CTL5 6, 7 to 9 CTL, CTL3 to CTL5 = 3 V 6, 7 to 9 CTL, CTL3 to CTL5 = 0 V 5 35 5 CTL, CTL3 to CTL5 = 0 V CTL = 0 V CTL = 3 V
Control block (CTL, CTL3 to CTL5) [CTL, CHCTL]
General
11
MB39A108
TYPICAL CHARACTERISTICS
Power supply current vs. Power supply voltage Power supply current ICC (mA)
Ta = + 25 C CTL = 3 V
Reference voltage vs. Power supply voltage Reference voltage VREF (V)
5 4 3 2 1 0 Ta = + 25 C CTL = 3 V VREF = 0 mA
5 4 3 2 1 0 0 2 4 6 8
10
12
0
2
4
6
8
10
12
Power supply voltage VCC (V)
Power supply voltage VCC (V)
Reference voltage vs. Operating ambient temperature Reference voltage VREF (V)
2.05 2.04 2.03 2.02 2.01 2.00 1.99 1.98 1.97 1.96 1.95 -40 -20 0 +20 +40 +60 +80 +100 VCC = 4 V CTL = 3 V VREF = 0 mA
Operating ambient temperature Ta ( C)
Reference voltage vs. CTL terminal voltage Reference voltage VREF (V)
Ta = + 25 C VCC = 4 V VREF = 0 mA
CTL terminal current vs. CTL terminal voltage CTL terminal current ICTL (A)
250 200 150 100 50 0 0 2 4 6 8 10 12
5.0 4.0 3.0 2.0 1.0 0.0 0 2 4 6 8
Ta = + 25 C VCC = 4 V
10
12
CTL terminal voltage VCTL (V)
CTL terminal voltage VCTL (V) (Continued)
12
MB39A108
Triangular wave oscillation frequency vs. Timing resistor
10000
Triangular wave oscillation frequency vs. Timing capacitor
10000
Triangular wave oscillation frequency fOSC (kHz)
CT = 27 pF 1000
Triangular wave oscillation frequency fOSC (kHz)
Ta = + 25 C VCC = 4 V CTL = 3 V
Ta = + 25 C VCC = 4 V CTL = 3 V RT = 2.4 k RT = 6.8 k RT = 13 k
1000
CT = 100 pF 100 CT = 680 pF CT = 220 pF
100
RT = 36 k
10 1 10 100 1000
10 10
100
1000
10000
Timing resistor RT (k)
Timing capacitor CT (pF)
Triangular wave upper and lower limit voltage vs. Triangular wave oscillation frequency Triangular wave upper and lower limit voltage VCT (V)
1.20 1.10 Ta = + 25 C VCC = 4 V 1.00 CTL = 3 V 0.90 RT = 6.8 k 0.80 0.70 0.60 0.50 0.40 0.30 0.20
0 200 400 600 800 1000 1200 1400 1600 1800 2000 2200
Triangular wave upper and lower limit voltage vs. Operating ambient temperature Triangular wave upper and lower limit voltage VCT (V)
1.20 1.10 1.00 0.90 0.80 0.70 0.60 0.50 0.40 0.30 0.20 -40 -20 0 +20 +40 Lower limit +60 +80 +100 VCC = 4 V CTL = 3 V RT = 6.8 k CT = 100 pF
Upper limit
Upper limit
Lower limit
Triangular wave oscillation frequency fOSC (kHz) Triangular wave oscillation frequency vs. Operating ambient temperature
1100
Operating ambient temperature Ta ( C)
Triangular wave oscillation frequency fOSC (kHz)
1080 1060 1040 1020 1000 980 960 940 920 900 -40 -20 0 +20 +40
VCC = 4 V CTL = 3 V RT = 6.8 k CT = 100 pF
+60
+80
+100
Operating ambient temperature Ta ( C) (Continued) 13
MB39A108
(Continued) ON Duty vs. DTC terminal voltage
100 95 90 85 80 75 70 65 60 55 50 0.6 0.65 0.7 0.75 0.8 0.85 0.9 Calculating value Measurement value
Start power supply voltage vs. Timing resistor
2
Start power supply voltage VCC (V)
ON Duty (%)
Ta = + 25 C VCC = 4 V CTL = 3 V FB = 2 V RT = 6.8 k CT = 100 pF
At evaluating Fujitsu EV board system Ta = - 30 C Ta = + 25 C 1.5
CTL = VCC CT = 100 pF 1 1 10 100
DTC terminal voltage VDTC (V)
Timing resistor RT (k)
Error amplifier voltage gain and phase vs. Frequency
50
Error amplifier voltage gain AV (dB)
40 30 20 10 0 -10 -20 -30 -40 -50 1k 10 k
Av
225 Ta = + 25 C 180 VCC = 4 V 135 45 0 -45 -90 -135 -180 -225 10 M
2.0 V 240 k
Phase (deg)
90
10 k 1 F + IN 10 k 2.4 k
37 38
- + + 1.0 V 36 OUT
1.5 V
Error Amp1 the same as other channels
100 k
1M
Frequency f (Hz) Power dissipation vs. Operating ambient temperature (TSSOP-38P) Power dissipation PD (mW)
1800 1680 1600 1400 1200 1000 800 600 400 200 0 -40 -20 0 +20 +40 +60 +80 +100
Power dissipation vs. Operating ambient temperature (BCC-40P) Power dissipation PD (mW)
1200 1020 1000 800 600 400 200 0 -40
2000
-20
0
+20
+40
+60
+80
+100
Operating ambient temperature Ta ( C)
Operating ambient temperature Ta ( C)
14
MB39A108
FUNCTIONAL DESCRIPTION
1. DC/DC Converter Function
(1) Reference voltage block (VREF) The reference voltage circuit generates the reference voltage (2.0 V Typ) to which it makes amends for the temperature by the voltage supplied by the power supply terminal (pin 5). It is used as a reference in IC voltage. It is also possible to supply the load current of up to 1 mA to external device as a output reference voltage through the VREF terminal (pin 11). (2) Triangular wave oscillator block (OSC) The triangular wave oscillator block generates the triangular wave oscillation waveforms of amplitude 0.4 V to 0.9 V by connecting the timing capacitor for and timing resistor to the CT terminal (pin 13) and RT terminal (pin 12) respectively. The triangular wave is input to the PWM comparator in the IC. (3) Error amplifier block (Error Amp1 to Error Amp5) The error amplifier detects output voltage of DC/DC converter and outputs PWM control signals. In addition, an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to inverted input terminal of the error amplifier, enabling stable phase compensation to the system. The CS1 terminal (pin 38) to CS5 terminal (pin 27) that are non-inverted input terminal of error amplifier can prevent rush currents at power supply startup, by connecting a soft-start capacitor. The soft-start time is detected by the error amplifier, which provides a constant soft-start time independent of output load of DC/DC converter. Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with CS1 terminal (pin 38) to CS5 terminal (pin 27) which are the non-inverted input terminal for Error Amp. The use of Error Amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is independent of the output load on the DC/DC converter. (4) PWM comparator block (PWM Comp.1 to PWM Comp.5) The PWM comparator block is a voltage-pulse width converter that controls the output duty depending on the input/output voltage. When the error amplifier output voltage and DTC voltage remain higher than the triangular wave voltage, output transistor is turned on. (5) Output block (Drive1 to Drive5) The output block is in the totem-pole type, capable of driving an external P-ch MOS FET (CH1 main side, and CH2 and CH3) and N-ch MOS FET (CH1 synchronous rectification side, and CH4 and CH5).
15
MB39A108
2. Channel Control Function
Main and each channel are set to ON/OFF by CTL terminal (pin 6) , CS1 terminal (pin 38) , CS2 terminal (pin 1) , CTL3 terminal (pin 7) , CTL4 terminal (pin 8) , and CTL5 terminal (pin 9) .
ON/OFF setting condition of each channel CTL L H H H H H H H CS1 X GND HiZ GND GND GND GND HiZ CS2 X GND GND HiZ GND GND GND HiZ CTL3 X L L L H L L H CTL4 X L L L L H L H CTL5 X L L L L L H H Power OFF ON ON ON ON ON ON ON CH1 Stops Stops
Operation
CH2 Stops Stops Stops
Operation
CH3 Stops Stops Stops Stops
Operation
CH4 Stops Stops Stops Stops Stops
Operation
CH5 Stops Stops Stops Stops Stops Stops
Operation
Stops Stops Stops Stops
Stops Stops Stops
Stops Stops
Stops
Operation Operation Operation Operation Operation
Note : Note that current over stand-by current flows into VCC terminal when the CTL terminal is in "L" level and one of terminals between CTL3 to CTL5 is set to "H" level (Refer to "* CTL3 to CTL5 terminal equivalent circuit"). * CTL3 to CTL5 terminal equivalent circuit
VCC CTL3
to 5
200 k
CTL5
ESD protection element
86 k
223 k GND
14
16
MB39A108
3. Protection Function
(1) Timer-latch short-circuit protection circuit (SCP, SCP Comp.) The short-circuit detection comparator (SCP) detects the output voltage level of each channel, and if any channel output voltage becomes the short-circuit detection voltage or less, the timer circuits are actuated to start charging the external capacitor Cscp connected to the CSCP terminal (pin 15) . When the capacitor (Cscp) voltage reaches about 0.7 V, the circuit is turned off the output transistor and sets the dead time to 100%. In addition, the short-circuit detection from external input is capable by using -INS terminal (pin 10) on shortcircuit detection comparator (SCP Comp.) . To release the actuated protection circuit, either turn the power supply off and on again or set the CTL terminal (pin 6) to the "L" level to lower the VREF terminal (pin 11) voltage to 1.27 V (Min) or less (Refer to " SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT") . (2) Under voltage lockout protection circuit block (UVLO) The transient state or a momentary decrease in the power supply voltage, which occurs when the power supply is turned on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect to the power supply voltage, turned off the output transistor, and set the dead time to 100 % while holding the CSCP terminal (pin 15) at "L" level. The circuit restores the output transistor to normal when the power supply voltage reaches the threshold voltage of the under-voltage lockout protection circuit.
PROTECTION CIRCUIT OPERATING FUNCTION TABLE
This table refers to output condition when protection circuit is operating. Operation circuit OUT1-1 OUT1-2 OUT2 Short-circuit protection circuit Under voltage lockout protection circuit H H L L H H OUT3 H H OUT4 L L OUT5 L L
17
MB39A108
SETTING THE OUTPUT VOLTAGE
CH1
Vo
R1 37 -INE1 R2 - + +
Error Amp Vo =
1.00 V R2 (R1 + R2)
1.00 V CS1
38
CH2 to CH5
Vo
R1 - -INEX R2 + +
Error Amp Vo =
1.23 V R2 (R1 + R2)
1.23 V CSX
X : Each channel No.
SETTING THE TRIANGULAR WAVE OSCILLATION FREQUENCY
The triangular wave oscillation frequency can be set by the timing resistor (RT) connected to the RT terminal (pin 12) and the timing capacitor (CT) connected to the CT terminal (pin 13). Triangular wave oscillation frequency : fosc 659600 CT (pF) x RT (k)
fosc (kHz) = :
18
MB39A108
SETTING THE SOFT-START TIME
To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors (CS1 to CS5) to the CS1 terminal (pin 38) to CS5 terminal (pin 27) respectively. As shown in the figure below, changing CTLX from "H" to "L" in the CH1 and CH2 circuits causes the external soft-start capacitors (CS1 and CS2) connected to CS1 and CS2 terminals to start charging with a current approximately 10 A. As shown in the figure on the next page, changing CTLX from "L" to "H" in the CH3 to CH5 circuits causes the external soft-start capacitors connected to CS3 to CS5 terminals to start charging with a current of approximately 1 A. The error amplifier output (FB1 to FB5) is determined by comparison between the lower voltage of the two noninverted input terminal voltage (1.23 V (CH : 1.0 V), CS terminal voltages) and the inverted input terminal voltage ( - INE1 to - INE5). The FB terminal voltage is decided for the soft-start period (CS terminal voltage < 1.23 V (CH1 : 1.0 V)) by the comparison between - INE terminal voltage and CS terminal voltage. The DC/DC converter output voltage rises in proportion to the CS terminal voltage as the soft-start capacitor externally connected to the CS terminal is charged. The soft-start time is obtained from the following formula : Soft-start time : ts(time to output 100%) CH1 : ts (s) = 0.100 x CSX (F) : CH2 : ts (s) = 0.123 x CSX (F) : CH3 to CH5 : ts (s) = 1.23 x CSX (F) : * Soft-start circuit (CH1, CH2)
Vo VREF 10 A R1 -INEX
R2
L priority
Error Amp - + + 1.0 V/ 1.23 V
CSX
CSX CTLX FBX
X : Each channel No.
19
MB39A108
* Soft-start circuit (CH3 to CH5)
Vo VREF 1 A R1 -INEX
R2
L priority
Error Amp
- + +
CSX CSX
1.23 V
FBX CTLX
CHCTL
X : Each channel No.
20
MB39A108
PROCESSING WHEN NOT USING CS TERMINAL
When soft-start function is not used, leave the CS1 terminal (pin 38), CS2 terminal (pin 1), CS3 terminal (pin 19), CS4 terminal (pin 20), and CS5 terminal (pin 27) open. * When not setting soft-start time "Open"
1 CS2 CS1 38
"Open"
"Open"
CS5 27
"Open"
19 CS3 CS4 20
"Open"
21
MB39A108
SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT
Each channel uses the short-circuit detection comparator (SCP Comp.) to always compare the error amplifier's output level to the reference voltage. While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output remains at "L" level, and the CSCP terminal (pin 15) is held at "L" level. If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage to drop, the output of the short-circuit detection comparator on that channel goes to "H" level. This causes the external short-circuit protection capacitor Cscp connected to the CSCP terminal to be charged at 1 A. Short-circuit detection time : tcscp tcscp (s) = 0.70 x Cscp (F) : When the capacitor Cscp is charged to the threshold voltage (VTH = 0.7V), the latch is set to and the external : FET is turned off (dead time is set to 100%). At this time, the latch input is closed and CSCP terminal (pin 15) is held at "L" level. In addition, the short-circuit detection from external input is capable by using -INS terminal (pin 10) on the shortcircuit detection comparator (SCP Comp.) . The short-circuit detection operation starts when -INS terminal voltage is less than threshold voltage (VTH = 1 V) . : When the power supply is turn off and on again or VREF terminal (pin 11) voltage is less than 1.27 V (Min) by setting CTL terminal (pin 6) to "L" level, the latch is released. * Timer-latch short-circuit protection circuit
Vo FBX
R1 - -INEX R2 +
Error Amp
1.23 V (CH1 : 1.0 V)
SCP Comp.
+ + -
1.1 V
1 A
CSCP 15
CTL VREF
To each channel drive
CSCP S R Latch UVLO
X : Each channel No.
22
MB39A108
PROCESSING WHEN NOT USING CSCP TERMINAL
When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 15) to GND with the shortest distance. * When not using CSCP terminal
14 15
GND CSCP
23
MB39A108
SETTING THE DEAD TIME
When the device is set for step-up or inverted output based on the step-up, step-up/down Zeta conversion, stepup/down Sepic conversion, or flyback conversion, the FB terminal voltage may reach and exceed the triangular wave voltage due to load fluctuation. If this is the case, the output transistor is fixed to a full-ON state (ON duty = 100 %). To prevent this, set the maximum duty of the output transistor. When the DTC terminal is opened, the maximum duty is 90% (Typ) because of this IC built-in resistance which sets the DTC terminal voltage. When the DTC terminal is not used, connect it directly to the VREF terminal (pin 11) as shown below (when no dead time is set). * When dead time is set (Setting by built-in resistance = 90%) : * When no dead time is set
11 VREF
"Open"
DTCX DTCX
X : Each channel No.
X : Each channel No.
Set the DTC terminal voltage by resistance divider from VREF terminal voltage when you change the maximum duty by external resistance (Refer to "* When dead time is set (Setting by external resistance)" ). When the DTC terminal voltage is higher than the triangular wave voltage, the output transistor is turned on. The maximum duty calculation formula assuming that triangular wave amplitude : = 0.5 V and triangular wave lower voltage : = 0.4 V is given below. It is possible to set DTC terminal voltage (dead time) by disregarding built-in resistance (include the tolerance) by adjusting external resistance to 1/10 or less of built-in resistance. Set to become 1mA or less in total of each channel the load current of VREF terminal. Vdt - 0.4 V 0.5 V x 100 (%)*
DUTY (ON) Max= :
Vdt =
Rb Ra + Rb
x VREF (condition : Ra <
R1 10
, Rb <
R2 10
)
* : DUTY obtained by the above-mentioned formula is a calculated value. For setting, refer to "ON Duty vs. DTC terminal voltage" in TYPICAL CHARACTERISTICS.
24
MB39A108
* When dead time is set (Setting by external resistance)
VREF 11
Ra DTCX
R1 : 131.9 k
To PWM Comp.
Vdt
Rb 14
GND
R2 : 97.5 k
X : Each channel No.
Example setting : For an aim Max duty (ON) of 80% (Vdt = 0.8 V) with Ra = 13.7 k and Rb = 9.1 k * Calculation using external resistors Ra and Rb only Vdt = Rb Ra + Rb x VREF = 0.80 V : Vdt - 0.4 V 0.5 V x 100 (%) = 80%* [1] :
DUTY (ON) Max = :
* Calculation considering internal resistor (tolerance 20%) also Vdt = (Rb and R2 combined resistance) (Ra and R1 combined resistance) + (Rb and R2 combined resistance) Vdt - 0.4 V 0.5 V x 100 (%) = 80% 0.2%* [2] : x VREF = 0.80 V 0.13% :
DUTY (ON) Max = :
* : Based on [1] and [2] above, selecting external resistances of 1/10th or less of the built-in resistance enables the built-in resistance to be ignored. As for the duty difference, please expect 5% (at fOSC = 1 MHz) . It is because of being with the difference of a triangular wave amplitude.
25
MB39A108
OPERATION EXPLANATION WHEN CTL TURNING ON AND OFF
When CTL is turned on, internal reference voltage VR and VREF generate. When VREF exceeds each threshold voltage (VTH1,VTH2) of UVLO1 and UVLO2 (under voltage lockout protection circuit), UVLO1 and UVLO2 are released, and the operation of output drive circuit of each channel becomes possible. When CTL is off, VR and VREF fall. When VREF decreases and UVLO1 and UVLO2 fall below each reset voltage (VRST1,VRST2), UVLO operates and output Drive circuit of each channel is forcibly done the operation stop, and makes the output off state. When period to reaching to 2.0 V by VREF voltage after UVLO1 and UVLO2 are released by turning on CTL (refer to a and b in "* Timing chart") and VREF decreases from 2.0 V after turning off CTL and the period until do the operation of UVLO1 and UVLO2(refer to a' and b' in "* Timing chart"), the bias voltage and the bias current in IC do not reach a prescribed value because VREF which is the reference voltage does not reach 2.0 V, and the speed of response for IC has decreased. Moreover, when it does the turning on and off of the input sudden change, the load sudden change, and CTL3 to CTL5 in this period, IC cannot conform and the output might overshoot. Therefore, impress the voltage to CTL terminal by which the VREF terminal voltage never stays in the abovementioned period. * CTL block equivalent circuit
H: at SCP
SCP
CH1 to CH3 To output Drive circuit H: Possible to operate L: Forcibly stop To CS1 to CS3 charge/ discharge circuit H: Possible to charge L: Forcibly discharge CH4 and CH5 To output Drive circuit H: Possible to operate L: Forcibly stop To CS4 and CS5 charge/ discharge circuit H: Possible to charge L: Forcibly discharge 5 Power ON/OFF CTL VCC
UVLO2
H: UVLO release
UVLO1 bias
ErrorAmp Reference
1.0 V/1.23 V
H: UVLO release
VREF VR
6
CTL
11 VREF
26
MB39A108
* Timing chart
V VR = 1.23 V (Typ)
Error Amp Reference voltage VR
VTH1
VTH2
VREF = 2.00 V (Typ)
VRST2 VRST1
Reference voltage VREF
UVLO4_5 b
UVLO4_5 release Valid UVLO4_5
a
b'
UVLO1_3 release
a'
UVLO1_3
Valid UVLO1_3 CH4 and CH5 Output drive circuit control CH1 to CH3 Output drive circuit control Possible operate Fixed full-off Possible operate Fixed full-off Fixed full-off Fixed full-off
CTL terminal voltage
1.1 V 0.2 V (Typ)
t
27
MB39A108
ABOUT THE LOW VOLTAGE OPERATION
1.7 V or more is necessary for the VCC terminal and the VCCO terminal for the self-power supply type to use the step-up circuit as the start voltage. Even if VIN decreases up to 1.5 V afterwards, it is possible to operate if the VCC terminal voltage and the VCCO terminal voltage rise to 2.5 V or more after start-up. However, it is necessary not to exceed the maximum duty set value by the duty due to the VIN decrease. Include other channels, and confirm an enough operation margin when using it. * Example of self-power supply method circuit
VIN
Step up
A
<>
A Vo5 (5 V)
R1
26
R2
-INE5 CS5
27
- + + 1.23 V
Error VREF Amp5
VCCO PWM Comp.5 Drive5 + + N-ch - 0.9 V 0.4 V
5 35 29
OUT5
Max duty 90% 5%
VCC
DTC5
24
28
MB39A108
I/O EQUIVALENT CIRCUIT
* Reference voltage block
VCC 5 1.23 V + -
* Control block
ESD protection element
11 VREF
* Channel control block (CH3 to to CH5)
VCC
CTL 6 53 k
CTLX 86 k
ESD protection element
79 k
124 k GND 14
ESD protection element
278 k GND
223 k GND
* Soft-start block
VREF (2.0 V)
* Short-circuit detection block
VREF (2.0 V) CSX 2 k 15 CSCP
* Short-circuit detection comparator block
VCC VREF (2.0 V) -INS 10 100 k
(1V)
GND
GND
GND
* Triangular wave oscillator block (RT)
VREF (2.0 V) 0.64 V + - 12 RT
* Triangular wave oscillator block (CT)
VREF (2.0 V)
CT 13
GND
GND
* Error amplifier block (CH1 to CH5)
VCC VREF (2.0 V) -INEX 1.0 V (CH1) 1.23 V (CH2 to CH5) GND CSX FBX
X : Each channel No. (Continued) 29
MB39A108
(Continued) * PMW comparator block
VCC VREF (2.0 V) 131.9 k FB2 to FB5 DTCX 97.5 k GNDO 28 GND CT OUTX VCCO 35
* Output block (CH1 to CH5)
X : Each channel No.
30
MB39A108
APPLICATION EXAMPLE
R35 R36 510 4.3 k -INE1 A 37 R37 24 k CS1 38 R38 C25 2 k 0.1 F FB1 36 C26 0.047 F
A 35 VCCO C24 0.1 F OUT1-1 C1 1 F Q1 L1 10 H D1 Q2
Step down
DVo1 1.2 V/500 mA C2 4.7 F
34 <>
33
OUT1-2
B
R39 R40 510 15 k -INE2 R41 15 k C27 0.1 F
Q3 2 C3 1 F
B L2 15 H D2
Step down
DVo2 2.5 V/250 mA C4 4.7 F
CS2 R42 1 k
1 <> 32
OUT2
VIN (2.5 V to 5 V)
FB2 3 C28 0.047 F DTC2 4 R45 R46 680 30 k -INE3 C 18 R47 10 k CS3 19 R48 C29 1 k 0.1 F FB3 17 C30 0.1 F DTC3 16 R51 R52 300 30 k -INE4 D 21 R53 18 k CS4 20 R54 C31 1 k 0.1 F FB4 22 C32 0.1 F DTC4 23 R57 R58 680 30 k -INE5 E 26 R59 10 k CS5 27 R60 C33 0.1 F 1 k FB5 25 C34 0.1 F DTC5 24 -INS
Transformer
Q5 T1 C8 1 F <> 31 OUT3 D5 C9 2.2 F C10 2.2 F C D4 TVo1-1 15 V/10 mA TVo1-2 5.0 V/50 mA
D L4 D6 10 F C12 4.7 L5 F 15 Q7 H
Step up/down
SVo1 3.3 V/500 mA C13 10 F
C11 1 F <> 30 OUT4
E D7 T2 D8 OUT5 GNDO C14 1 F Q9 D9
Transformer
TVo2-1 15 V/10 mA TVo2-2 5.0 V/50 mA TVo2-3 -7.5 V/-5 mA
<>
29 28
C16 C17 2.2 F 2.2 F
C18 2.2 F
Short-circuit 10 detection signal (L: at short-circuit)
CSCP C35 2200 pF 15 5 VCC C23 0.1 F CTL
CTL3 7 CTL4 8 CTL5 9
6
12 RT R63 6.8 k
13 CT C36 100 pF
11 VREF C37 0.1 F
14 GND
31
MB39A108
PARTS LIST
COMPONENT Q1, Q3 Q2, Q7, Q9 Q5 D1, D2, D6 D4, D5, D7 to D9 L1, L4 L2, L5 T1, T2 C1, C3 C2, C4, C12 C8, C11 C9, C10 C13 C14 C16 to C18 C23 to C25, C27 C26, C28 C29 to C34 C35 C36 C37 R35, R39 R36 R37 R38 R40, R41 R42, R48, R54 R45, R57 R46, R52, R58 R47, R59 R51 R53 R60 R63 ITEM P-ch FET N-ch FET P-ch FET Diode Diode Inductor Inductor Transformer Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Ceramics Condenser Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor Resistor SPECIFICATION VDS = - 12 V, ID = - 1.5 A VDS = 20 V, ID = 1.8 A VDS = - 20 V, ID = - 2 A VF = 0.4 V (Max), at IF = 1 A VF = 0.55 V (Max), at IF = 0.5 A 10 H 15 H 1 F 4.7 F 1 F 2.2 F 10 F 1 F 2.2 F 0.1 F 0.047 F 0.1 F 2200 pF 100 pF 0.1 F 510 4.3 k 24 k 2 k 15 k 1 k 680 30 k 10 k 300 18 k 1 k 6.8 k 0.94 A, 56 m 0.76 A, 97 m 25 V 16 V 25 V 25 V 6.3 V 25 V 25 V 50 V 50 V 50 V 50 V 50 V 50 V 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% 0.5% VENDOR SANYO SANYO SANYO SANYO SANYO TDK TDK SUMIDA TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK TDK ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm ssm PARTS No. MCH3317 MCH3405 MCH3306 SBS004 SB05-05CP RLF5018T100MR94 RLF5018T150MR76 CLQ52 5388-T138 C3216JB1E105K C3216JB1C475K C3216JB1E105K C3216JB1E225K C3216JB0J106K C3216JB1E105K C3216JB1E225K C1608JB1H104K C1608JB1H473K C1608JB1H104K C1608JB1H222K C1608CH1H101J C1608JB1H104K RR0816P-511-D RR0816P-432-D RR0816P-243-D RR0816P-202-D RR0816P-153-D RR0816P-102-D RR0816P-681-D RR0816P-303-D RR0816P-103-D RR0816P-301-D RR0816P-183-D RR0816P-102-D RR0816P-682-D
Note : SANYO : SANYO Electric Co., Ltd. TDK : TDK Corporation SUMIDA : Sumida Corporation ssm : SUSUMU CO., LTD.
32
MB39A108
REFERENCE DATA
Total efficiency vs. Input voltage
100 95 90
IC stops by the short-circuit detection operation of CH2 in VIN = 2.6 V or less. :
Total efficiency (%)
85 80 75 70 65 60 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0
Ta = + 25 C DVO1 = 1.2 V, 500 mA DVO2 = 2.5 V, 250 mA TVO1-1 = 15 V , 10 mA TVO1-2 = 5 V, 50 mA SVO1 = 3.3 V, 500 mA TVO2-1 = 15 V, 10 mA TVO2-2 = 5 V, 50 mA TVO2-3 = 7.5 V, -5 mA fOSC = 1 MHz setting
Input voltage VIN (V)
Each CH efficiency vs. Input voltage
100 95
Each CH Efficiency (%)
90 CH2 85 CH1 80 75 70 65 60 2.0 2.5 3.0 CH5 Ta = + 25 C DVO1 = 1.2 V, 500 mA DVO2 = 2.5 V, 250 mA TVO1-1 = 15 V , 10 mA TVO1-2 = 5 V, 50 mA SVO1 = 3.3 V, 500 mA TVO2-1 = 15 V, 10 mA TVO2-2 = 5 V, 50 mA TVO2-3 = -7.5 V, -5 mA fOSC = 1 MHz Setting 3.5 4.0 4.5 CH4
CH3
Note : Only concerned CH is ON. Driving current of external SW Tr is contained.
5.0
5.5
6.0
6.5
7.0
Input voltage VIN (V)
(Continued)
33
MB39A108
CH1 and CH4 efficiency vs. Load current
100 VIN = 3.6 V 95 Ta = +25 C
CH1 and CH4 efficiency (%)
90 CH1 85 CH4 80 75 70 65 60 0 50 100 150 200 250 300 350 400 450 500
DIO1 (CH1) 50 mA : discontinuance mode SIO1 (CH4) 80 mA : discontinuance mode Note : Only concerned CH is ON. Driving current of external SW Tr is contained.
Load current IO (mA)
CH2 efficiency vs. Load current
100 VIN = 3.6 V 95 CH2 90 Ta = +25 C
CH2 efficiency (%)
85 80 75 70 65 60 0 25 50 75 100 125 150 175 200 225 250
Note : Only concerned CH is ON. Driving current of external SW Tr is contained.
DIO2 (CH2) 30 mA : discontinuance mode
Load current IO (mA)
(Continued)
34
MB39A108
CH3 and CH5 efficiency vs. Load current
100 95
Notes : * Only feedback controlling output is get by using transformer channel. TVO1-1 (15 V) : IO = 10 mA fixed TVO2-1 (15 V) : IO = 10 mA fixed TVO2-3 ( - 7.5 V) : IO = - 5 mA fixed * Only concerned CH is ON. Driving current of external SW Tr is contained.
VIN = 3.6 V Ta = +25 C
CH3 and CH5 efficiency (%)
90 85 80 75
CH5
CH3 70 65
TIO1-2 (CH3), TIO2-2 (CH5) 10 mA : discontinuance mode
60 0 10 20 30 40 50 60
Load current IO (mA)
(Continued)
35
MB39A108
Switching waveform (CH1)
Ta = +25 C VIN = 3.6 V DVo1 = 1.2 V lo1 = 500 mA OUT1-2 [V] 5 0
OUT1-1 [V] 5 0
VD [V] 4 2 0
t [s] 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Switching waveform (CH2)
OUT2 [V] 5 0
Ta = +25 C VIN = 3.6 V DVo2 = 2.5 V lo2 = 250 mA
VD [V] 4 2 0 t [s] 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Switching waveform (CH3)
OUT3 [V] 5 0
Ta = +25 C VIN = 3.6 V TVo1-1 = 15 V Tlo1-1 = 10 mA TVo1-2 = 5 V TVo3 = 50 mA
VD [V] 5 0 -5 -10 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 t [s]
(Continued) 36
MB39A108
(Continued) Switching waveform (CH4)
Ta = +25 C VIN = 3.6 V SVo1 = 3.3 V Slo1 = 500 mA
OUT4 [V] 5 0
VD [V] 10 5 0 t [s] 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
Switching waveform (CH5)
OUT5 [V] 5 0 Ta = +25 C VIN = 3.6 V TVo2-1 = 15 V Tlo2-1 = 10 mA TVo2-2 = 5 V Tlo2-2 = 50 mA TVo2-3 = -7.5 V Tlo2-3 = -5 mA
VD [V] 10 5 0 t [s] 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
37
MB39A108
USAGE PRECAUTIONS
* Printed circuit board ground lines should be set up with consideration for common impedance. * Take appropriate static electricity measures. * Containers for semiconductor materials should have anti-static protection or be made of conductive material. * After mounting, printed circuit boards should be stored and shipped in conductive bags or containers. * Work platforms, tools, and instruments should be properly grounded. * Working personnel should be grounded with resistance of 250 k to 1 M between body and ground. * Do not apply negative voltages. * The use of negative voltages below -0.3 V may create parasitic transistors on LSI lines, which can cause malfunction.
ORDERING INFORMATION
Part number MB39A108PFT-E1 MB39A108PV2-E1 Package 38-pin plastic TSSOP (FPT-38P-M03) 40-pin plastic BCC (LCC-40P-M07) Remarks Lead Free version Lead Free version
EV BOARD ORDERING INFORMATION
EV board part No. MB39A108EVB-01 EV board version No. Board Rev. 1.0 Remarks TSSOP-38P
RoHS COMPLIANCE INFORMATION OF LEAD (Pb) FREE VERSION
The LSI products of Fujitsu with "E1" are compliant with RoHS Directive , and has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated biphenyls (PBB) , and polybrominated diphenyl ethers (PBDE) . The product that conforms to this standard is added "E1" at the end of the part number.
38
MB39A108
MARKING FORMAT (LEAD FREE VERSION)
MB39A108 XXXX XXX E1
INDEX
TSSOP-38P (FPT-38P-M03)
Lead Free version
INDEX
3 9A108 XXXX XXX E1
Lead Free version
BCC-40 (LCC-40P-M07)
39
MB39A108
LABELING SAMPLE (LEAD FREE VERSION)
lead-free mark JEITA logo JEDEC logo
MB123456P - 789 - GE1
(3N) 1MB123456P-789-GE1 1000
G
Pb
(3N)2 1561190005 107210
QC PASS
PCS 1,000 MB123456P - 789 - GE1
2006/03/01
ASSEMBLED IN JAPAN
1/1
MB123456P - 789 - GE1
0605 - Z01A 1000
1561190005
Lead Free version
40
MB39A108
MB39A108PFT-E1 (TSSOP-38P) RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL
Item Mounting Method Mounting times Before opening Storage period From opening to the 2nd reflow When the storage period after opening was exceeded Storage conditions Condition IR (infrared reflow) , Manual soldering (partial heating method) 2 times Please use it within two years after Manufacture. Less than 8 days Please processes within 8 days after baking (125 C, 24H)
5 C to 30 C, 70%RH or less (the lowest possible humidity)
[Temperature Profile for FJ Standard IR Reflow] (1) IR (infrared reflow) H rank : 260 C Max
260 C 255 C
170 C to 190 C
RT
(b)
(c)
(d)
(e)
(a)
(d')
(a) Temperature Increase gradient (b) Preliminary heating (c) Temperature Increase gradient (d) Actual heating (d')
(e) Cooling
: Average 1 C/s to 4 C/s : Temperature 170 C to 190 C, 60 s to 180 s : Average 1 C/s to 4 C/s : Temperature 260 C Max; 255 C or more, 10 s or less : Temperature 230 C or more, 40 s or less or Temperature 225 C or more, 60 s or less or Temperature 220 C or more, 80 s or less : Natural cooling or forced cooling
Note : Temperature : the top of the package body (2) Manual soldering (partial heating method) Conditions : Temperature 400 C Max Times : 5 s max/pin 41
MB39A108
MB39A108PV2-E1 (BCC-40) RECOMMENDED CONDITIONS OF MOISTURE SENSITIVITY LEVEL
Item Mounting Method Mounting times Storage period Storage conditions Before opening From opening to the reflow Condition IR (infrared reflow) , Manual soldering (partial heating method) 2 times Please use it within two years after Manufacture.
5 C to 30 C, 70%RH or less (the lowest possible humidity)
[Temperature Profile for FJ Standard IR Reflow] (1) IR (infrared reflow) H rank : 260 C Max
260 C 255 C
170 C to 190 C
RT
(b)
(c)
(d)
(e)
(a)
(d')
(a) Temperature Increase gradient (b) Preliminary heating (c) Temperature Increase gradient (d) Actual heating (d')
(e) Cooling
: Average 1 C/s to 4 C/s : Temperature 170 C to 190 C, 60 s to 180 s : Average 1 C/s to 4 C/s : Temperature 260 C Max; 255 C or more, 10 s or less : Temperature 230 C or more, 40 s or less or Temperature 225 C or more, 60 s or less or Temperature 220 C or more, 80 s or less : Natural cooling or forced cooling
Note : Temperature : the top of the package body (2) Manual soldering (partial heating method) Conditions : Temperature 400 C Max Times : 5 s max/pin
42
MB39A108
PACKAGE DIMENSION
38-pin plastic TSSOP Lead pitch Package width x package length Lead shape Sealing method Mounting height 0.50 mm 4.40 x 9.70 mm Gullwing Plastic mold 1.10 mm MAX
(FPT-38P-M03)
38-pin plastic TSSOP (FPT-38P-M03)
9.700.10(.382.004) 1.10(.043) MAX
0~8
0.600.10 (.024.004)
0.25(.010)
INDEX
4.400.10 6.400.10 (.173.004) (.252.004)
0.100.10 (.004.004)
0.50(.020) 0.900.05 (.035.002)
0.1270.05 (.005.002)
0.10(.004) 9.00(.354)
C
2002 FUJITSU LIMITED F38003Sc-1-1
Dimensions in mm (inches). Note: The values in parentheses are reference values.
(Continued)
43
MB39A108
(Continued)
40-pin plastic BCC
Lead pitch Package width x package length Sealing method Mounting height Weight
0.50 mm 6.00 mm x 6.00 mm Plastic mold 0.80 mm MAX 0.05 g
(LCC-40P-M07)
40-pin plastic BCC (LCC-40P-M07)
6.000.10(.236.004)
31 21
0.80(.031)MAX (Mount height)
21
5.20(.205)TYP 5.10(.201)TYP 0.50(.020) TYP 0.500.10 (.020.004)
31
0.14(.006) MIN 6.000.10 (.236.004) INDEX AREA 5.10(.201) TYP 5.20(.205) TYP
0.50(.020) TYP 5.25(.207) REF 4.00(.157) REF 0.500.10 (.020.004) "C"
11 1 11
"B"
0.0750.025 (.003.001) (Stand off) 0.700.06 (.028.002)
"A" 4.00(.157)REF 5.25(.207)REF Details of "B" part 0.550.06 (.022.002)
1
Details of "A" part 0.14(.006) MIN 0.05(.002)
Details of "C" part C0.20(.008) 0.550.06 (.022.002)
0.600.06 (.024.002)
0.300.06 (.012.002)
0.550.06 (.022.002)
0.550.06 (.022.002)
C
2004 FUJITSU LIMITED C40057S-c-1-1
Dimensions in mm (inches). Note: The values in parentheses are reference values.
44
MB39A108
FUJITSU LIMITED
All Rights Reserved. The contents of this document are subject to change without notice. Customers are advised to consult with FUJITSU sales representatives before ordering. The information, such as descriptions of function and application circuit examples, in this document are presented solely for the purpose of reference to show examples of operations and uses of Fujitsu semiconductor device; Fujitsu does not warrant proper operation of the device with respect to use based on such information. When you develop equipment incorporating the device based on such information, you must assume any responsibility arising out of such use of the information. Fujitsu assumes no liability for any damages whatsoever arising out of the use of the information. Any information in this document, including descriptions of function and schematic diagrams, shall not be construed as license of the use or exercise of any intellectual property right, such as patent right or copyright, or any other right of Fujitsu or any third party or does Fujitsu warrant non-infringement of any third-party's intellectual property right or other right by using such information. Fujitsu assumes no liability for any infringement of the intellectual property rights or other rights of third parties which would result from the use of information contained herein. The products described in this document are designed, developed and manufactured as contemplated for general use, including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not designed, developed and manufactured as contemplated (1) for use accompanying fatal risks or dangers that, unless extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury, severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control, mass transport control, medical life support system, missile launch control in weapon system), or (2) for use requiring extremely high reliability (i.e., submersible repeater and artificial satellite). Please note that Fujitsu will not be liable against you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention of over-current levels and other abnormal operating conditions. If any products described in this document represent goods or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the prior authorization by Japanese government will be required for export of those products from Japan. Edited Business Promotion Dept.
F0608

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